Announced wAVR on AVR Freaks today. Must admit I was a bit apprehensive of the community’s response to Yet Another ISP Programmer, but it’s off to a decent start.
Clearly AVR is still a popular MCU but there’s no denying that ARM Cortex-M is encroaching into the traditional 8-bit micro space. wAVR itself was originally designed around an XMega MCU but was changed to a SAM4S4 when RAM became tight. Cost was also a factor; it beggars belief that a 32-bit MCU such as SAM4S4 is significantly cheaper than the 8-Bit XMega256A3U.
One of the design goals of wAVR was flexibility in terms of target CPU, to hedge against something knocking AVR off its perch. Obviously the initial offering is targeting AVR but the hardware should be more than capable of interfacing to the standard ARM CoreSight Serial Wire Debug (SWD) interface. It’s one, maybe two, pins short of being capable of a fully-fledged JTAG interface but SWD is well within reach.
So the next phase of the project is to add CMSIS-DAP support to wAVR, plus some simple patches to OpenOCD. I’m a little worried that it may not perform well due to packet RTT over WiFi, but time will tell.